We have presented an optimal buffer sizing and buffer insertion methodologywhich uses stochastic models of the architecture and Continuous Time MarkovDecision Processes CTMDPs. Such a methodology is useful in managing the scarcebuffer resources available on chip as compared to network based datacommunication which can have large buffer space. The modeling of this problemin terms of a CT-MDP framework lead to a nonlinear formulation due to usage ofbridges in the bus architecture. We present a methodology to split the probleminto several smaller though linear systems and we then solve these subsystems.
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